Digi NS9750 Manual de usuario descargar pdf (Pagina 19)

System Memory interface

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F4 byte_lane_sel_n[1] 8 O Static memory byte_lane_enable[1] or

write_enable_n[1] for byte-wide device signals

D1 byte_lane_sel_n[2] 8 O Static memory byte_lane_enable[2] or

write_enable_n[2] for byte-wide device signals

F3 byte_lane_sel_n[3] 8 O Static memory byte_lane_enable[3] or

write_enable_n[3] for byte-wide device signals

B5 cas_n 8 O SDRAM column address strobe

A8 dy_cs_n[0] 8 O SDRAM chip select signal

B8 dy_cs_n[1] 8 O SDRAM chip select signal

A6 dy_cs_n[2] 8 O SDRAM chip select signal

C7 dy_cs_n[3] 8 O SDRAM chip select signal

C6 st_oe_n 8 O Static memory output enable

D6 ras_n 8 O SDRAM row address strobe

H1 dy_pwr_n 8 O SyncFlash power down

B10 st_cs_n[0] 8 O Static memory chip select signal

C10 st_cs_n[1] 8 O Static memory chip select signal

B9 st_cs_n[2] 8 O Static memory chip select signal

C9 st_cs_n[3] 8 O Static memory chip select signal

B6 we_n 8 O SDRAM write enable. Used for static and SDRAM

devices.

J3 ta_strb U I Slow peripheral transfer acknowledge

Pin # Signal Name

U/D

(mA)

I/O Description

Table 5: System Memory interface pinout

1 2 ... 14 15 16 17 18 19 20 21 22 23 24 ... 87 88

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Digi NS9750 Manual de usuario Pagina 19